1. Field of the Invention
This invention relates to a photo mask pattern designing method, resist pattern fabricating method and semiconductor device manufacturing method, especially suitable for application to correction of the pattern configuration of a photo mask used in a lithographic process for multiplexing exposure.
2. Description of the Related Art
In the industry of manufacturing semiconductor devices, along with progressive miniaturization of patterns, the demand for higher resolution beyond the resolution limit determined by the wavelength of light has been getting larger also in lithographic processes.
And recently, a phase shift mask has come to be used as a technique for making a micro pattern below the wavelength of light used upon exposure. With this type of phase shift mask, a high resolution can be obtained by using a phase difference of beams of light transmitting the mask. Therefore, adjacent beams of transmitted light must be inverted in phase from each other.
Further, as a technology for making a micro pattern using such a phase shift mask, there is a method which once executes exposure by using the phase shift mask, and thereafter again executes exposure for removing an undesired pattern produced by the first exposure, that is, executes twin exposure, to make a pattern. The twin exposure technique is under practical use for manufacturing high-speed LSI.
In case of resolving pattern configurations different in pattern density, a difference in line width undesirably occurs due to the pattern densities after resolution. Thus, for reducing the line width difference, there has been proposed a photo mask pattern designing method that corrects the phase shift mask used for high-resolution exposure toward reducing the line width difference.
However, such correction often causes undesirable decrease of tolerance in exposure and/or tolerance in depth of focus, and possibly reduces the window (ED window) made up of the exposure tolerance and the depth of focus.
Further, the phase shift mask is fabricated in a critical region of the photo mask fabricating technique. Therefore, correction for thinning the line width of the pattern on the photo mask applies a large load to fabrication of the mask.
Additionally, together with miniaturization of patterns, difference in density of patterns on a photo mask is getting larger. The increase of difference in density is accompanied by a tendency toward a larger amount of correction of patterns.
Under such movement, there has been a demand for the development of a correction technique of a photo mask fabricated in a lithographic process that can minimize reduction of a pattern on a photo mask by taking account of the critical region of the mask fabricating technique. There has also been a demand for the development of a correction technique of a photo mask fabricated in a lithographic process that can reduce the line width range upon making a resist pattern different in density, having sparse and dense portions.
It is therefore an object of the invention to provide a photo mask pattern designing method that can be used upon correcting a pattern on a photo mask used for making a single-layered resist pattern having patterns different in density and line width by a plurality of exposure steps. The method can provide a sufficient tolerance for exposure and a sufficient tolerance for lithographic process in term of the depth of focus, for example, while decreasing the line width difference by the pattern density of the resist pattern made by exposure.
It is a further object of the invention to provide a resist pattern fabricating method that can be used upon making a resist pattern through a plurality of exposure steps using a plurality of different photo masks and can precisely make a single-layered resist pattern having patterns different in pattern density and line width while providing a sufficient tolerance for exposure and a sufficient tolerance for lithographic process in terms of the depth of focus, for example.
It is a still further object of the invention to provide a semiconductor device manufacturing method that can precisely make a resist pattern different in pattern density while providing a sufficient tolerance for exposure and a sufficient tolerance for lithographic process in terms of the depth of focus to manufacture a semiconductor device having a combination of patterns different in density, and to manufacture a semiconductor device with a high reliability even by mass production.
According to the first aspect of the invention, there is provided a photo mask pattern designing method configured to correct pattern configuration of at least one of a plurality of kinds of photo masks used upon making a single-layered resist pattern by transferring pattern configuration through a plurality of times of exposure of a resist coated on a substrate, characterized in that:
a first photo mask used for exposure using interference of light among the plurality of times of exposure has a first shading region and a first translucent region adjacent to each other;
a second photo mask used for exposure before or after the exposure using interference of light has a second shading region and a second translucent region adjacent to each other;
the first shading region and the second shading region are substantially aligned in location in the first photo mask and the second photo mask;
the first translucent region and the second translucent region are substantially aligned in location in the first photo mask and the second photo mask;
the first shading region is corrected in width in the direction of adjacent alignment of the first shading region and the first translucent region; and
the second shading region is corrected in width in the direction of adjacent alignment of the second shading region and the second translucent region.
According to the second aspect of the invention, there is provided a resist pattern fabricating method configured to fabricate a single-layered resist pattern on a resist coated on a substrate by executing a plurality of times of exposure including first exposure using a first photo mask and interference of light and a second exposure using a second photo mask, characterized in that:
a first shading region formed on the first photo mask and a second shading region formed on the second photo mask are substantially aligned in location on the first photo mask and the second photo mask; and
a first translucent region formed on the first photo mask and a second translucent region formed on the second photo mask are substantially aligned in location on the first photo mask and the photo mask,
and comprising the steps of:
conducting the first exposure of the first shading region by using the first photo mask corrected in width in the direction of adjacent alignment of the first shading region and the first translucent region; and
conducting the second exposure of the second shading region by using the second photo mask corrected in width in the direction of adjacent alignment of the second shading region and the second translucent region.
According to the third aspect of the invention, there is provided A semiconductor device manufacturing method configured to make a resist pattern on a resist coated on a semiconductor substrate by executing a plurality of times of exposure including first exposure using a first photo mask and interference of light and second exposure using a second photo mask, and thereafter process the semiconductor substrate by using the resist pattern as a mask, characterized in that:
a first shading region formed on the first photo mask and a second shading region formed on the second photo mask are substantially aligned in location on the first photo mask and the second photo mask; and
a first translucent region formed on the first photo mask and a second translucent region formed on the second photo mask are substantially aligned in location on the first photo mask and the photo mask,
and comprising the steps of:
conducting the first exposure of the first shading region by using the first photo mask corrected in width in the direction of adjacent alignment of the first shading region and the first translucent region; and
conducting the second exposure of the second shading region by using the second photo mask corrected in width in the direction of adjacent alignment of the second shading region and the second translucent region.
In the present invention, since influences of a mask fabrication error by correction of the second shading region of the second photo mask are larger than influences of a mask fabrication error by correction of the first shading region of the first photo mask, correction of the second shading region of the second photo mask is preferably conducted preferentially. Further, in the present invention, correction of the first shading region includes correction by which the correction amount results in zero.
In the present invention, correction of the first shading region and correction of the second shading region are conducted toward reducing the line width range in the single-layered resist pattern made by at least two exposure steps using a first photo mask and a second photo mask, respectively.
In the present invention, in the first translucent region and the first shading region adjacent to each other in the first photo mask, a third translucent region is typically provided to sandwich the first shading region, and light beams transmitting the first translucent region and the third translucent region are different in phase by approximately 180xc2x0.
In the present invention, since high-resolution exposure using interference of light must be conducted, the first photo mask is typically a phase shift mask. Further, in the present invention, the phase shift mask is typically a Rebenson phase shift mask, but if necessary, a half-tone phase shift mask, an auxiliary pattern mask, edge-enhanced phase shift mask, chromeless phase shift mask, or the like, may be used.
In the present invention, since normal exposure is conducted after exposure using the first photo mask and using interference of light, the second photo mask is typically a binary mask.
In the photo mask pattern designing method resist pattern fabricating method and semiconductor device manufacturing method according to the invention as summarized above, since correction is made for the line width of the first shading region and also for the width of the second shading region, it is possible to ensure correction taking account of the fabrication limit of the mask and reliably provide the ED window made up of the exposure tolerance and depth of focus of a sufficiently wide range.
The above, and other, objects, features and advantage of the present invention will become readily apparent from the following detailed description thereof which is to be read in connection with the accompanying drawings.